1 AM4534C analog power september, 2003 - rev. a preliminary publication order number: ds-am4534_e these miniature surface mount mosfets utilize high cell density process. low r ds(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. typical applications are pwmdc-dc converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. v ds (v) r ds(on) m( ? )i d (a) 40 @ v gs = 4.5v 6.0 28 @ v gs = 10v 7.0 80 @ v gs = -2.5v -4.0 52 @ v gs = -4.5v -5.2 30 product summary -26.5 p & n-channel 30-v (d-s) mosfet ?low r ds(on) provides higher efficiency and extends battery life ? miniature so-8 surface mount package saves board space ? high power and current handling capability ? low side high current dc-dc converter applications notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature 1 2 3 4 7 8 5 6 symbol n-channe l p-channe l units v ds 30 -26.5 v gs 20 12 t a =25 o c 7 -5.2 t a =70 o c 5.6 -6.8 i dm 20 -20 i s 1.3 -1.3 a t a =25 o c 2.1 2.1 t a =70 o c1.31.3 t j , t stg o c power dissipation a p d operating junction and storage temperature range w -55 to 150 continuous source current (diode conduction) a absolute maximum ratings (t a = 25 o c unless otherwise noted) parameter pulsed drain current b v gate-source voltage drain-source voltage continuous drain current a i d a symbol maximum units maximum junction-to-case a t <= 5 sec r jc 40 o c/w maximum junction-to-ambient a t <= 5 sec r ja 60 o c/w thermal resistance ratings parameter
2 AM4534C analog power september, 2003 - rev. a preliminary publication order number: ds-am4534_e notes a. pulse test: pw <= 3 00us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. analog power (apl) reserves the right to make changes without further notic e to any products herein. apl makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does apl assume any liability arising ou t of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, conseque ntial or incidental damages. ?typical? parameters which may be provided in apl data sheet s and/or specifications can a nd do vary in different appli cations and actual performance may vary over time. all operating parameters , including ?typicals? must be validated for each customer appl ication by customer?s technical experts. apl does not convey any license under its patent rights nor the rights of others. apl products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications int ended to support or sustain life, or for any other application in which the failure of the apl product could create a situation where personal inju ry or death may occur. should buyer purchase or use apl products for any such uninte nded or unauthorized application, buyer shall indemnify and hold a pl and its officers, employees, subsidiari es, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that apl was negligent regarding the design or m anufacture of the part. apl is an equal opportunity/affirmative action employer. ch m in typ max v gs = 0 v, i d = 250 u a n30 v gs = 0 v, i d = -250 u a p-26 v gs = v ds , i d = 250 u a n1 v gs = v ds , i d = -250 ua p-1 v gs = -12 v, v ds = 0 v p100 v gs = 20 v, v ds = 0 v n100 v ds = -21.2 v, v gs = 0 v p-1 v ds = 24 v, v gs = 0 v n1 v ds = 5 v, v gs = 10 v n20 v ds = -5 v, v gs = -4.5 v p-20 vgs = 10 v, i d = 7 a 28 vgs = 4.5 v, i d = 6 a 40 vgs = -4.5 v, i d = -5 a 52 vgs = -2.5 v, i d = -4 a 80 v ds = 15 v, i d = 7 a n 25 v ds = -15 v, i d = -5 a p10 n4 p25 n1.1 p2.4 n1.4 p3.9 n 8 p 7 n 5 p 13 n23 p14 n3 p9 forward tranconductance a g fs s total gate charge q g n-channel v ds =15v, v gs =10v, i d =7a p-channel v ds =-15v, v gs =-4.5v, i d =-5a nc limits unit specifications (t a = 25 o c unless otherwise noted) na static test conditions v v symbol parameter gate-threshold voltage v gs(th) drain-source breakdown voltage v (br)dss a gate-body leakage i gss ua i dss zero gate voltage drain current n p on-state drain current a i d(on) t r t d(off) m ? drain-source on-resistance a r ds(on) switching dynamic turn-on delay time rise time ns n-chaneel v dd =15v, v gs =10v, i d =1a , r gen =6 ? , p-channel v dd =-15v, v gs =-4.5v, i d =-1a r gen =6 ? fall-time t f turn-off delay time t d(on) gate-source charge q gs gate-drain charge q gd
3 AM4534C analog power september, 2003 - rev. a preliminary publication order number: ds-am4534_e package information so-8: 8lead h x 45
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